Particularly in medical and vehicle engineering, electronics need to be extremely reliable. That is why we apply the principle of “over-design”: additional safety reserves are planned at the design stage. This, however, is not only very costly, but in addition – as technology gets smaller and smaller – is becoming increasingly difficult to implement. That is why it is possible to simulate the wear experienced by semiconductors. The standard simulations for new types of production technologies, however, often do not produce the desired results. For this reason, researchers at Fraunhofer IIS/EAS have developed mathematical models that can be used to forecast the aging processes of transistors years in advance.

The models take account not only of typical effects such as hot carrier injection or bias temperature instability (BTI). New types of models developed by Fraunhofer IIS/EAS are also used. For the first time, accurate models can be used to determine the recovery effects in the context of BTI aging, saturation behavior across the lifecycle, and other complex dependencies. All models are produced by Fraunhofer IIS/EAS consistently and for all common design environments used around the world.

“For the first time, we offer our customers the option of verifying and validating the function of complete electronic systems in different operating conditions,” explains Roland Jancke, Director of the Department of Design Methods at Fraunhofer IIS/EAS.